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Computer Science > Machine Learning

Title: Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning

Abstract: High-Level Synthesis (HLS) Design Space Exploration (DSE) is a widely accepted approach for efficiently exploring Pareto-optimal and optimal hardware solutions during the HLS process. Several HLS benchmarks and datasets are available for the research community to evaluate their methodologies. Unfortunately, these resources are limited and may not be sufficient for complex, multi-component system-level explorations. Generating new data using existing HLS benchmarks can be cumbersome, given the expertise and time required to effectively generate data for different HLS designs and directives. As a result, synthetic data has been used in prior work to evaluate system-level HLS DSE. However, the fidelity of the synthetic data to real data is often unclear, leading to uncertainty about the quality of system-level HLS DSE. This paper proposes a novel approach, called Vaegan, that employs generative machine learning to generate synthetic data that is robust enough to support complex system-level HLS DSE experiments that would be unattainable with only the currently available data. We explore and adapt a Variational Autoencoder (VAE) and Generative Adversarial Network (GAN) for this task and evaluate our approach using state-of-the-art datasets and metrics. We compare our approach to prior works and show that Vaegan effectively generates synthetic HLS data that closely mirrors the ground truth's distribution.
Comments: Accepted at Great Lakes Symposium on VLSI 2024 (GLSVLSI 24)
Subjects: Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)
DOI: 10.1145/3649476.3658738
Cite as: arXiv:2404.14754 [cs.LG]
  (or arXiv:2404.14754v1 [cs.LG] for this version)

Submission history

From: Yuchao Liao [view email]
[v1] Tue, 23 Apr 2024 05:32:22 GMT (600kb,D)

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