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Electrical Engineering and Systems Science > Signal Processing

Title: Efficient Verification of a RADAR SoC Using Formal and Simulation-Based Methods

Abstract: As the demand for Internet of Things (IoT) and Human-to-Machine Interaction (HMI) increases, modern System-on-Chips (SoCs) offering such solutions are becoming increasingly complex. This intricate design poses significant challenges for verification, particularly when time-to-market is a crucial factor for consumer electronics products. This paper presents a case study based on our work to verify a complex Radio Detection And Ranging (RADAR) based SoC that performs on-chip sensing of human motion with millimetre accuracy. We leverage both formal and simulation-based methods to complement each other and achieve verification sign-off with high confidence. While employing a requirements-driven flow approach, we demonstrate the use of different verification methods to cater to multiple requirements and highlight our know-how from the project. Additionally, we used Machine Learning (ML) based methods, specifically the Xcelium ML tool from Cadence, to improve verification throughput.
Comments: Published in DVCon Europe 2023
Subjects: Signal Processing (eess.SP); Artificial Intelligence (cs.AI)
Cite as: arXiv:2404.15371 [eess.SP]
  (or arXiv:2404.15371v1 [eess.SP] for this version)

Submission history

From: Aman Kumar [view email]
[v1] Sat, 20 Apr 2024 13:16:55 GMT (804kb,D)

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