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Hardware Architecture

Authors and titles for recent submissions

[ total of 27 entries: 1-26 | 27 ]
[ showing 26 entries per page: fewer | more | all ]

Wed, 29 May 2024

[1]  arXiv:2405.18168 [pdf, other]
Title: Efficient Adaptable Streaming Aggregation Engine
Authors: Philippos Papaphilippou, Wayne Luk
Subjects: Hardware Architecture (cs.AR); Databases (cs.DB)
[2]  arXiv:2405.18371 (cross-list from quant-ph) [pdf, other]
Title: ML-QLS: Multilevel Quantum Layout Synthesis
Authors: Wan-Hsuan Lin, Jason Cong
Subjects: Quantum Physics (quant-ph); Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC)
[3]  arXiv:2405.17481 (cross-list from cs.LG) [pdf, ps, other]
Title: Improving Simulation Regression Efficiency using a Machine Learning-based Method in Design Verification
Authors: Deepak Narayan Gadde, Sebastian Simon, Djones Lettnin, Thomas Ziller
Comments: Published in DVCon Europe 2022
Subjects: Machine Learning (cs.LG); Hardware Architecture (cs.AR)

Tue, 28 May 2024

[4]  arXiv:2405.17365 [pdf, other]
Title: DR-CGRA: Supporting Loop-Carried Dependencies in CGRAs Without Spilling Intermediate Values
Authors: Elad Hadar, Yoav Etsion
Subjects: Hardware Architecture (cs.AR)
[5]  arXiv:2405.17363 [pdf, other]
Title: Optimized thread-block arrangement in a GPU implementation of a linear solver for atmospheric chemistry mechanisms
Authors: Christian Guzman Ruiz, Mario Acosta, Oriol Jorba, Eduardo Cesar Galobardes, Matthew Dawson, Guillermo Oyarzun, Carlos Pérez García-Pando, Kim Serradell
Comments: Accepted manuscript
Journal-ref: Computer Physics Communications 302 (1 September 2024): 109240
Subjects: Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC); Performance (cs.PF); Software Engineering (cs.SE)
[6]  arXiv:2405.17025 [pdf, other]
Title: SWAT: Scalable and Efficient Window Attention-based Transformers Acceleration on FPGAs
Authors: Zhenyu Bai, Pranav Dangi, Huize Li, Tulika Mitra
Comments: Accepeted paper for DAC'22
Subjects: Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
[7]  arXiv:2405.17378 (cross-list from cs.LG) [pdf, ps, other]
Title: RTL-Repo: A Benchmark for Evaluating LLMs on Large-Scale RTL Design Projects
Authors: Ahmed Allam, Mohamed Shalan
Subjects: Machine Learning (cs.LG); Hardware Architecture (cs.AR)
[8]  arXiv:2405.17322 (cross-list from cs.DC) [pdf, other]
Title: Evaluation of computational and energy performance in matrix multiplication algorithms on CPU and GPU using MKL, cuBLAS and SYCL
Authors: L.A. Torres, Carlos J. Barrios H, Yves Denneulin
Comments: 14 pages
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC); Hardware Architecture (cs.AR)
[9]  arXiv:2405.17221 (cross-list from cs.AI) [pdf, other]
Title: Efficient Orchestrated AI Workflows Execution on Scale-out Spatial Architecture
Authors: Jinyi Deng, Xinru Tang, Zhiheng Yue, Guangyang Lu, Qize Yang, Jiahao Zhang, Jinxi Li, Chao Li, Shaojun Wei, Yang Hu, Shouyi Yin
Subjects: Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)
[10]  arXiv:2405.16623 (cross-list from cs.LG) [pdf, other]
Title: Graph neural networks with configuration cross-attention for tensor compilers
Authors: Dmitrii Khizbullin, Eduardo Rocha de Andrade, Thanh Hau Nguyen, Matheus Pedroza Ferreira, David R. Pugh
Subjects: Machine Learning (cs.LG); Hardware Architecture (cs.AR); Performance (cs.PF)
[11]  arXiv:2405.15877 (cross-list from cs.LG) [pdf, other]
Title: Basis Selection: Low-Rank Decomposition of Pretrained Large Language Models for Target Applications
Authors: Yang Li, Changsheng Zhao, Hyungtak Lee, Ernie Chang, Yangyang Shi, Vikas Chandra
Subjects: Machine Learning (cs.LG); Hardware Architecture (cs.AR); Computation and Language (cs.CL)

Mon, 27 May 2024

[12]  arXiv:2405.15705 [pdf, other]
Title: Sums: Sniffing Unknown Multiband Signals under Low Sampling Rates
Authors: Jinbo Peng, Zhe Chen, Zheng Lin, Haoxuan Yuan, Zihan Fang, Lingzhong Bao, Zihang Song, Ying Li, Jing Ren, Yue Gao
Comments: 12 pages, 9 figures
Subjects: Hardware Architecture (cs.AR); Systems and Control (eess.SY)
[13]  arXiv:2405.15381 [pdf, other]
Title: Single-Event Upset Analysis of a Systolic Array based Deep Neural Network Accelerator
Authors: Naïn Jonckers, Toon Vinck, Gert Dekkers, Peter Karsmakers, Jeffrey Prinzie
Comments: This work has been submitted to RADECS 2024 for possible publication
Subjects: Hardware Architecture (cs.AR); Signal Processing (eess.SP)
[14]  arXiv:2405.15380 [pdf, other]
Title: Full-stack evaluation of Machine Learning inference workloads for RISC-V systems
Authors: Debjyoti Bhattacharjee, Anmol, Tommaso Marinelli, Karan Pathak, Peter Kourzanov
Comments: RISC-V Summit Europe 2024
Subjects: Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
[15]  arXiv:2405.15537 (cross-list from cs.CR) [pdf, ps, other]
Title: Do Not Trust Power Management: Challenges and Hints for Securing Future Trusted Execution Environments
Authors: Owen Le Gonidec, Maria Méndez Real, Guillaume Bouffard, Jean-Christophe Prévotet
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR); Emerging Technologies (cs.ET)
[16]  arXiv:2405.15322 (cross-list from cs.CR) [pdf, other]
Title: Dishonest Approximate Computing: A Coming Crisis for Cloud Clients
Authors: Ye Wang, Jian Dong, Ming Han, Jin Wu, Gang Qu
Comments: 12 pages, 9 figures
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[17]  arXiv:2405.15184 (cross-list from cs.CR) [pdf, other]
Title: TrojanForge: Adversarial Hardware Trojan Examples with Reinforcement Learning
Authors: Amin Sarihi, Peter Jamieson, Ahmad Patooghy, Abdel-Hameed A. Badawy
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR); Machine Learning (cs.LG)
[18]  arXiv:2405.14978 (cross-list from eess.SP) [pdf, other]
Title: Analog or Digital In-memory Computing? Benchmarking through Quantitative Modeling
Authors: Jiacong Sun, Pouya Houshmand, Marian Verhelst
Subjects: Signal Processing (eess.SP); Hardware Architecture (cs.AR); Image and Video Processing (eess.IV)
[19]  arXiv:2405.13938 (cross-list from cs.LG) [pdf, other]
Title: eXmY: A Data Type and Technique for Arbitrary Bit Precision Quantization
Authors: Aditya Agrawal, Matthew Hedlund, Blake Hechtman
Subjects: Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR); Numerical Analysis (math.NA)

Fri, 24 May 2024

[20]  arXiv:2405.13170 [pdf, other]
Title: FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
Authors: Jianming Tong, Anirudh Itagi, Prasanth Chatarasi, Tushar Krishna
Comments: 17 pages, 14 figures. International Symposium on Computer Architecture (ISCA), Jun 2024
Subjects: Hardware Architecture (cs.AR)
[21]  arXiv:2405.14209 (cross-list from cs.PF) [pdf, other]
Title: Exploring and Evaluating Real-world CXL: Use Cases and System Adoption
Authors: Jie Liu (1), Xi Wang (1), Jianbo Wu (1), Shuangyan Yang (1), Jie Ren (2), Bhanu Shankar (3), Dong Li (1) ((1) University of California, Merced, (2) William & Mary, (3) MemVerge, Inc)
Subjects: Performance (cs.PF); Hardware Architecture (cs.AR)
[22]  arXiv:2405.13927 (cross-list from cs.CR) [pdf, other]
Title: Memory Scraping Attack on Xilinx FPGAs: Private Data Extraction from Terminated Processes
Authors: Bharadwaj Madabhushi, Sandip Kundu, Daniel Holcomb
Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR)
[23]  arXiv:2405.13858 (cross-list from cs.DC) [pdf, other]
Title: Carbon Connect: An Ecosystem for Sustainable Computing
Authors: Benjamin C. Lee, David Brooks, Arthur van Benthem, Udit Gupta, Gage Hills, Vincent Liu, Benjamin Pierce, Christopher Stewart, Emma Strubell, Gu-Yeon Wei, Adam Wierman, Yuan Yao, Minlan Yu
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC); Hardware Architecture (cs.AR); Emerging Technologies (cs.ET); Machine Learning (cs.LG)
[24]  arXiv:2405.13043 (cross-list from physics.ao-ph) [pdf, ps, other]
Title: Towards Specialized Supercomputers for Climate Sciences: Computational Requirements of the Icosahedral Nonhydrostatic Weather and Climate Model
Authors: Torsten Hoefler, Alexandru Calotoiu, Anurag Dipankar, Thomas Schulthess, Xavier Lapillonne, Oliver Fuhrer
Subjects: Atmospheric and Oceanic Physics (physics.ao-ph); Hardware Architecture (cs.AR); Distributed, Parallel, and Cluster Computing (cs.DC); Computational Physics (physics.comp-ph)

Wed, 22 May 2024 (showing first 2 of 3 entries)

[25]  arXiv:2405.12849 [pdf, other]
Title: Training and inference in the ReckON RSNN architecture implemented on a MPSoC
Authors: Alejandro Linares-Barranco, Luciano Prono, Robert Lengenstein, Giacomo Indiveri, Charlotte Frenkel
Comments: Under review at ICECS'24
Subjects: Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
[26]  arXiv:2405.12304 [pdf, other]
Title: Automatic Hardware Pragma Insertion in High-Level Synthesis: A Non-Linear Programming Approach
Authors: Stéphane Pouget, Louis-Noël Pouchet, Jason Cong
Subjects: Hardware Architecture (cs.AR)
[ total of 27 entries: 1-26 | 27 ]
[ showing 26 entries per page: fewer | more | all ]

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