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Electrical Engineering and Systems Science > Systems and Control

Title: Efficient and Timely Memory Access

Abstract: This paper investigates the optimization of memory sampling in status updating systems, where source updates are published in shared memory, and reader process samples the memory for source updates by paying a sampling cost. We formulate a discrete-time decision problem to find a sampling policy that minimizes average cost comprising age at the client and the cost incurred due to sampling. We establish that an optimal policy is a stationary and deterministic threshold-type policy, and subsequently derive optimal threshold and the corresponding optimal average cost.
Comments: To be presented at ISIT 2024
Subjects: Systems and Control (eess.SY); Information Theory (cs.IT)
Cite as: arXiv:2404.14596 [eess.SY]
  (or arXiv:2404.14596v1 [eess.SY] for this version)

Submission history

From: Vishakha Ramani [view email]
[v1] Mon, 22 Apr 2024 21:41:07 GMT (1254kb,D)

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